Search - pci fpga

[VHDL-FPGA-Verilog] fpgaPCI

Description: fpga开发pci的verilog，不可多得的源代码。-FPGA development pci of verilog, rare source code.
Platform: | Size: 1726464 | Author: 王军 | Hits:

[VHDL-FPGA-Verilog] BusMasteringPCIExpressInAnFPGA

Description: This paper describes a bus mastering implementation of the PCI Express protocol using a Xilinx FPGA. While the theoretical peak performance of PCI Express is quite high, attaining that performance is a complex endeavor on top of an already complex protocol. The implementation is described and its performance is analyzed. Source code is offered for free download via the web.
Platform: | Size: 141312 | Author: Andrey | Hits:

[VHDL-FPGA-Verilog] FPGA_SDRAM_PCI

Description: 一个基于FPGA的PCI数据采集程序，包括SDRAM控制，PCI9054时序控制，开发语言verilog，开发环境quartus-FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartusII
Platform: | Size: 2798592 | Author: 李国扬 | Hits:

[Embeded-SCM Develop] OpenPCI_Driver

Description: FPGA 实现的PCI程序源码，难得的好资料。-FPGA realization of the PCI procedure source, a rare good information.
Platform: | Size: 3072 | Author: 周明 | Hits:

[VHDL-FPGA-Verilog] yuyincaiji

Description: 语音采集与回放系统源代码：1.为了使读音数据存储的时间更长，速度更快，选用了256K*16Bit的SRAM；2.为了减少单片机的控制复杂度，使用了FPGA来控制SRAM的读写操作，节约了不少单片机的I/O资源；3.为了以后的高速数据存储，本设计中加入了fifo,其位宽及深度可在程序中自由设置，方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data storage, faster, 256K* 16Bit selected the SRAM 2. In order to reduce the complexity of single-chip control, the use of the FPGA to control the SRAM The read and write operations, saving a lot of microcontroller I/O resources 3. to future high-speed data storage, the design into the fifo, its width and depth can be set up in the process of free, convenient and flexible.
Platform: | Size: 804864 | Author: song | Hits:

[Embeded-SCM Develop] DM642pci

Description: DM642 PCI q驱动包括主机端和目标端-DM642 PCI q drive, including the host side and target side
Platform: | Size: 880640 | Author: 刘德坤 | Hits:

[Program doc] rjwxdpt

Description: 软件无线电技术是用于卫星导航和第三代移动通信(3G) 数据处理和计算的最优解决方案。运用基于FPGA的So PC 嵌入式设计方法构造软件无线电系统,提高了对动态实时信号的处理能力。设计完成无线通信体系结构,以及ADC 模数转换,数字下变频,CPU 中央处理器,DSP 运算单元,PCI 桥以及数据控制等模块的详细组成。相对于目前常规系统,该系统在功耗和体积方面可节省30 以上,对高速数据流的处理和计算能力有显著提高,可以应用于Cellular/ PCS 基站,GPS 抗干扰接收机,相控阵接收机,频谱分析和3G无线通信等领域。-Software radio technology is used for satellite navigation and third-generation mobile communication (3G) data processing and computing the optimal solution. So PC using FPGA-based embedded design methods to create software-defined radio system to improve the dynamic real-time signal processing capabilities. Wireless communications architecture design is completed and the ADC analog-digital conversion, digital down conversion, CPU CPU, DSP computing unit, PCI bridge, and data control module, the detailed composition. Relative to the current conventional systems, the system can save power consumption and size are more than 30 of the high-speed data stream processing and computing power has significantly increased, can be applied to Cellular/PCS base stations, GPS anti-jamming receivers, phased array receivers, spectrum analysis, and 3G wireless communications and other fields.
Platform: | Size: 516096 | Author: x | Hits:

[Windows Develop] PCI9054source

Description: 这是9054里自带的FPGA的跑马灯的源程序-This is the 9054 where the FPGA comes with the source code of the Marquee
Platform: | Size: 18383872 | Author: hcz | Hits:

[VHDL-FPGA-Verilog] testbench

Description: altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
Platform: | Size: 1759232 | Author: greenpine | Hits:

[VHDL-FPGA-Verilog] pci_steuerung_target

Description: vhdl code for card pci to fpga
Platform: | Size: 7168 | Author: sina | Hits:

[VHDL-FPGA-Verilog] pci_steuerung_master

Description: vhdl code for card pci to fpga
Platform: | Size: 4096 | Author: sina | Hits:

[VHDL-FPGA-Verilog] pci32tlite_oc_latest.tar

Description: pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC' s in ALTERA CYCLONE II FPGA).
Platform: | Size: 7813120 | Author: shen | Hits:

[VHDL-FPGA-Verilog] Verilog

Description: 学习FPGA的经典教材，绝对值得珍藏！夏宇闻的！-FPGA' s classic study materials, collection is worth! XIA smell!
Platform: | Size: 23392256 | Author: liuliang | Hits:

[VHDL-FPGA-Verilog] Xilinx_PCIE_DMA

Description: Xilinx芯片所有关于PCI Express接口的DMA源代码，包含相关的配套的文档资料。-Xilinx chip on the PCI Express interface for all DMA source code, including relevant supporting documentation.
Platform: | Size: 30834688 | Author: caomeideweidao | Hits:

[VHDL-FPGA-Verilog] PCIbus_Verilog

Description: PCI总线（Slave）接口FPGA的实现代码，全部为Verilog语言源码文件，还包括测试代码，内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation.
Platform: | Size: 428032 | Author: Field | Hits:

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